Miller compensation is a conventional frequency compensation technique that involves the movement of a dominant pole of a gain stage to a lower frequency by increasing the effective input capacitance of the gain stage. Miller compensation circuits include a Miller capacitor that exploits the Miller effect. When the Miller capacitor is connected across an input and an output of an amplifier, the capacitance appears much larger from the input of the amplifier. While the dominant pole may be moved to a lower frequency using this approach, bandwidth of the system is still limited.
Referring now to FIG. 1, a Miller compensation circuit 10 includes first and second amplifiers 12 and 14, respectively. An output of the first amplifier 12 communicates with an input of the second amplifier 14. A first end of a first capacitor 16 (or parasitic capacitance) communicates with the input of the second amplifier 14. A first end of a second capacitor 18 (or load capacitance) communicates with an output of the second amplifier 14. Second ends of the first and second capacitors 16 and 18, respectively, communicate with a ground potential 20. A first end of a third capacitor 22 (or compensating capacitance) communicates with the input of the second amplifier 14. A second end of the third capacitor 22 communicates with the output of the second amplifier 14.
An input voltage 24, vin, of the Miller compensation circuit 10 is applied to an input of the first amplifier 12. An output voltage 26, vout, of the Miller compensation circuit 10 is referenced from the output of the second amplifier 14. The transconductance, gm2, of the second amplifier 14 may be increased to increase the overall bandwidth.
Referring now to FIGS. 2A and 2B, there are two conventional ways to increase the transconductance of the second amplifier 14. In FIG. 2A, a voltage gain device 28 is used in the feed forward path to increase the transconductance. An input of the voltage gain device 28 communicates with the first ends of the first and third capacitors 16 and 22, respectively, and the output of the first amplifier 12. An output of the voltage gain device 28 communicates with the input of the second amplifier 14.
In FIG. 2B, a current gain device 30 is used in the feedback path to increase the transconductance. An input of the current gain device 30 communicates with the first end of the third capacitor 22. An output of the current gain device 30 communicates with the output of the first amplifier 12, the input of the second amplifier 14, and the first end of the first capacitor 16. An Ahuja compensation circuit 32 is created by adding the current gain device 30 in the feedback path. A transconductance, gm3, is associated with the current gain device 30.
While both the voltage gain device 28 in FIG. 2A and the current gain device 30 in FIG. 2B increase the transconductance of the second amplifier 14, both arrangements also generate a new pole. Poles tend to limit the bandwidth of a circuit. Therefore, there is a cost associated with increasing the transconductance of the second amplifier 14. In the case of the current gain device 30 in FIG. 2B, a pole is generated that is associated with the current gain device 30 and the third capacitor 22. The pole is equal to
            g              m        3                    C      m        ,where gm3 is the transconductance of the current gain device 30 and Cm is the capacitance of the third capacitor 22.
The following discussion sets forth the bandwidth of the circuit in FIG. 2B. In order to derive the bandwidth, an open loop response technique is used. The open loop response technique provides information relating to the bandwidth and maximum achievable bandwidth of a circuit. The DC gain of the open loop response is determined by opening the feedback loop at the output of the amplifier and attaching a voltage source to one end of the opened feedback loop. The output voltage is sensed at the other end (corresponding to the output of the amplifier) of the opened feedback loop.
To derive the bandwidth, the DC gain of the open loop response and the first dominant pole P1 are found. Assuming stable operation, there is only one pole P1 that is located below a crossover frequency. The crossover frequency is the product of the DC gain of the open loop response and the first dominant pole P1. The crossover frequency defines the bandwidth of the closed loop amplifier. The maximum available bandwidth is related to the second non-dominant pole P2.
Referring now to FIG. 2C, the open loop response of the circuit of FIG. 2B is shown. Initially, the open loop response of the second amplifier stage will be considered. When the open loop response technique is employed, the feedback loop is opened between the capacitance Cm and the output of the second amplifier 14. The input voltage is applied to the disconnected end of the capacitance Cm and the output voltage is taken at the output of the second amplifier 14. At DC, the capacitance is an open circuit. Therefore the gain is usually considered at a mid-frequency as shown in FIG. 2C. The gain at mid-frequency is
      g    m2    ⁢            R      o2        ⁡          (                        C          m                          C          p                    )      and the first dominant pole occurs at
  1            R      o2        ⁡          (                        C          L                +                  C          m                    )      for the second stage. Multiplying the gain of the open loop response with the dominant pole P1 results in the crossover frequency of
            g              m        2                            C        L            +              C        m              ⁢      (                  C        m                    C        p              )  for the second stage. Further the second stage has a first non-dominant pole at
            g              m        3                    C      m        ,which relates to a barrier frequency or maximum achievable bandwidth.
The unity bandwidth or crossover frequency of the second stage is equivalent to the first non-dominant pole of the main loop including the first amplifier 12. As described above, the first non-dominant pole defines a barrier frequency or maximum achievable bandwidth of the circuit. Therefore, the circuit in FIG. 2B has a frequency response that is limited to
                    g                  m          2                                      C          L                +                  C          m                      ⁢          (                        C          m                          C          p                    )        ,which is undesirable.
Referring now to FIG. 2D, in one approach, a fourth capacitor 34 that may be added to the Ahuja frequency compensation circuit 32. A first end of the fourth capacitor 34 communicates with the input of the second amplifier 14 and a second end of the fourth capacitor 34 communicates with the output of the second amplifier 14. However, while the arrangement in FIG. 2D may be utilized to adjust the non-dominant pole, the non-dominant pole still creates a limitation on the overall bandwidth of the system. The addition of the zero improves the frequency response slightly and alleviates the phase margin of the internal loop.
Alternatively, the transconductance of the current gain device 30 may be increased to increase the frequency of the non-dominant pole. However, conventional methods for increasing the transconductance of the current gain device 30 usually increase power consumption and/or require additional components.